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general description the max4737/max4738/max4739 low-voltage, low on- resistance (r on ), quad single-pole/single throw (spst) analog switches operate from a single +1.8v to +5.5v supply. these devices are designed for usb 1.1 and audio switching applications. the max4737/max4738/max4739 feature 4.5 ? r on (max) with 1.2 ? flatness and 0.4 ? matching between channels. these new switches feature guaranteed operation from +1.8v to +5.5v and are fully specified at 3v and 5v. these switches offer break-before-make switching (1ns) with t on <80ns and t off <40ns at +2.7v. the digital logic inputs are +1.8v logic compati- ble with a +2.7v to +3.6v supply. these switches are packaged in a chip-scale package (ucsp), significantly reducing the required pc board area. the chip occupies only a 2mm ? 2mm area and has a 4 ? 4 bump array with a bump pitch of 0.5mm. these switches are also available in a 14-pin tssop and a 16-pin thin qfn (4mm x 4mm) package. applications battery-operated equipment audio/video-signal routing low-voltage data-acquisition systems sample-and-hold circuits data-acquisition systems communications circuits features ? usb 1.1 signal switching ? 2ns (max) differential skew ? -3db bandwidth: >300mhz ? low 20pf on-channel capacitance ? low r on 4.5 ? (max) (+3v supply) 3 ? (max) (+5v supply) ? 0.4 ? (max) r on match (+3v supply) ? 1.2 ? (max) r on flatness (+3v supply) ? <0.5na leakage current at +25? ? high off-isolation: -55db (10mhz) ? low crosstalk: -80db (10mhz) ? low distortion: 0.03% ? +1.8v cmos-logic compatible ? single-supply operation from +1.8v to +5.5v ? rail-to-rail signal handling max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp ________________________________________________________________ maxim integrated products 1 19-2633; rev 1; 4/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. c d b a 1234 in2 com2 com1 no2 in3 v+ no1 no3 gnd in1 com3 com4 no4 in4 top view (bumps side down) max4737 c d b a 1234 in2 com2 com1 nc2 in3 v+ nc1 nc3 gnd in1 com3 com4 nc4 in4 max4738 c d b a 1234 in2 com2 com1 nc2 in3 v+ no1 no3 gnd in1 com3 com4 nc4 in4 max4739 in_ low high no_ off on nc_ on off ucsp ucsp ucsp pin configurations/functional diagrams/truth tables ucsp is a trademark of maxim integrated products, inc. ordering information part temp range pin/bump- package top mark max4737 eud -40? to +85? 14 tssop max4737ete -40? to +85? 16 thin qfn max4737ebe-t -40? to +85? 16 ucsp-16 4737 max4738 eud -40? to +85? 14 tssop max4738ete -40? to +85? 16 thin qfn max4738ebe-t -40? to +85? 16 ucsp-16 4738 max4739 eud -40? to +85? 14 tssop max4739ete -40? to +85? 16 thin qfn max4739ebe-t -40? to +85? 16 ucsp-16 4739 pin configurations/functional diagrams/truth tables continued at end of data sheet
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?ingle +3v supply (v+ = +2.7v to +3.6v, v ih = +1.4v, v il = +0.5v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +3.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd) v+, in_...................................................................-0.3v to +6.0v com_, no_, nc_ (note 1) ...........................-0.3v to (v+ + 0.3v) continuous current com_, no_, nc_ ...........................?00ma peak current com_, no_, nc_ (pulsed at 1ms, 10% duty cycle)................................?00ma continuous power dissipation (t a = +70?) 14-pin tssop (derate 6.3mw/? above +70?) .........500mw 16-bump ucsp (derate 8.3mw/? above +70?) ......659mw 16-pin thin qfn (derate 25mw/? above +70?) ....2000mw esd method 3015.7 .............................................................>2kv operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? bump temperature (soldering) infrared (15s) ...............................................................+220? vapor phase (60s) .......................................................+215? note 1: signals on com_, no_, or nc_ exceeding v+ or gnd are clamped by internal diodes. limit forward-diode current to maxi- mum current rating. parameter symbol conditions t a min typ max units analog signal range v com_ , v no_ , v nc_ 0v+v analog switch +25? 3.0 4.5 on-resistance (note 5) r on v+ = 2.7v, i com_ = 10ma; v no_ or v nc_ = 1.5v t min to t max 5 ? +25? 0.1 0.4 on-resistance match between channels (notes 5, 6) ? r on v+ = 2.7v, i com_ = 10ma; v no_ or v nc_ = 1.5v t min to t max 0.5 ? +25? 0.6 1.2 on-resistance flatness (note 7) r flat ( on ) v+ = 2.7v, i com_ = 10ma; v no_ or v nc_ = 1.0v, 1.5v, 2.0v t min to t max 1.5 ? +25? -0.5 +0.01 +0.5 no_, nc_ off-leakage current (note 8) i no_ ( off ) , i nc_ ( off ) v+ = 3.6v, v com_ = 0.3v, 3.3v; v no_ or v nc_ = 3.3v, 0.3v t min to t max -1 +1 na +25? -0.5 +0.01 +0.5 com_ off-leakage current (note 8) i c om_ ( off ) v+ = 3.6v, v com_ = 0.3v, 3.3v; v no_ or v nc_ = 3.3v, 0.3v t min to t max -1 +1 na +25? -1 +0.01 +1 com_ on-leakage current (note 8) i com_ ( on ) v+ = 3.6v, v com_ = 0.3v, 3.3v; v no_ or v nc_ = 0.3v, 3.3v, or floating t min to t max -2 +2 na
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp _______________________________________________________________________________________ 3 electrical characteristics?ingle +3v supply (continued) (v+ = +2.7v to +3.6v, v ih = +1.4v, v il = +0.5v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +3.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units dynamic characteristics +25? 40 80 turn-on time t on v no_ , v nc_ = 1.5v; r l = 300 ? , c l = 35pf, figure 1 t min to t max 100 ns +25? 20 40 turn-off time t off v no_ , v nc_ = 1.5v; r l = 300 ? , c l = 35pf, figure 1 t min to t max 50 ns +25? 8 break-before-make time delay (max4739 only) (note 8) t bbm v no_ , v nc_ = 1.5v; r l = 300 ? , c l = 35pf, figure 2 t min to t max 1 ns skew (note 8) t skew r s = 39 ? , c l = 50pf, figure 3 t min to t max 0.15 2 ns charge injection q v gen = 2v, r gen = 0 ? , c l = 1.0nf, figure 4 +25? 5 pc f = 10mhz; v no_ , v nc_ = 1v p-p ; r l = 50 ? , c l = 5pf, figure 5a -55 off-isolation (note 9) v iso f = 1mhz; v no_ , v nc_ = 1v p-p ; r l = 50 ? , c l = 5pf, figure 5a +25? -80 db f = 10mhz; v no_ , v nc_ = 1v p-p ; r l = 50 ? , c l = 5pf, figure 5b -80 crosstalk (note 10) v ct f = 1mhz; v no_ , v nc_ = 1v p-p ; r l = 50 ? , c l = 5pf, figure 5b +25? -110 db on-channel -3db bandwidth bw signal = 0dbm, c l = 5pf, 50 ? in and out, figure 5a +25? 300 mhz total harmonic distortion thd r l = 600 ? +25? 0.03 % no_, nc_ off-capacitance c no_ ( off ) , c nc_ ( off ) f = 1mhz, figure 6 +25? 9 pf switch on-capacitance c on f = 1mhz, figure 6 +25? 15 pf digital i/o input logic high voltage v ih t min to t max 1.4 v input logic low voltage v il t min to t max 0.5 v input leakage current i in v+ = 3.6v, v in_ = 0 or 5.5v t min to t max -0.1 +0.1 a
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp 4 _______________________________________________________________________________________ electrical characteristics?ingle +5v supply (v+ = +4.2v to +5.5v, v ih = +2.0v, v il = +0.8v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +5.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units analog signal range v com_ , v no_ , v nc_ t min to t max 0v+v analog switch +25? 1.7 3.0 on-resistance (note 5) r on v+ = 4.2v; i com_ = 10ma; v no_ or v nc_ = 3.5v t min to t max 3.5 ? +25? 0.1 0.3 on-resistance match between channels (notes 5, 6) ? r on v+ = 4.2v; i com_ = 10ma; v no_ or v nc_ = 3.5v t min to t max 0.4 ? +25? 0.4 1.2 on-resistance flatness (note 7) r flat ( on ) v+ = 4.2v; i com_ = 10ma; v no_ or v nc_ = 1.0v, 2.0v, 3.5v t min to t max 1.5 ? +25? -0.5 0.01 +0.5 no_, nc_ off-leakage current (note 8) i no_ ( off ), i nc_ ( off ) v+ = 5.5v; v com_ = 1.0v, 4.5v; v no_ or v nc_ = 4.5v, 1.0v t min to t max -1 +1 na +25? -0.5 0.01 +0.5 com_ off-leakage current (note 8) i com_ ( off ) v+ = 5.5v; v com_ = 1v, 4.5v; v no_ or v nc_ = 4.5v, 1v t min to t max -1 +1 na +25? -1 0.01 +1 com_ on-leakage current (note 8) i com_ ( on ) v+ = 5.5v; v com_ = 1.0v, 4.5v; v no_ or v nc_ = 1.0v, 4.5v, or floating t min to t max -2 +2 na dynamic characteristics +25? 30 80 turn-on time t on v no_ , v nc_ = 3.0v; r l = 300 ? , c l = 35pf, figure 1 t min to t max 100 ns +25? 20 40 turn-off time t off v no_ , v nc_ = 3.0v; r l = 300 ? , c l = 35pf, figure 1 t min to t max 50 ns electrical characteristics?ingle +3v supply (continued) (v+ = +2.7v to +3.6v, v ih = +1.4v, v il = +0.5v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +3.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units supply supply voltage range v+ t min to t max 1.8 5.5 v positive supply current i+ v+ = 5.5v, v in_ = 0v or v+ t min to t max 1a
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp _______________________________________________________________________________________ 5 electrical characteristics?ingle +5v supply (continued) (v+ = +4.2v to +5.5v, v ih = +2.0v, v il = +0.8v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +5.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units +25? 8 break-before-make time delay (max4739 only) (note 8) t bbm v no_ , v nc_ = 3.0v; r l = 300 ? , c l = 35pf, figure 2 t min to t max 1 ns skew (note 8) t skew r s = 39 ? , c l = 50pf, figure 3 t min to t max 0.15 2 ns digital i/o input logic high voltage v ih t min to t max 2.0 v input logic low voltage v il t min to t max 0.8 v input leakage current i in v+ = 5.5v, v in _ = 0v or v+ t min to t max -0.1 +0.1 a power supply power-supply range v+ t min to t max 1.8 5.5 v positive supply current i+ v+ = 5.5v, v in_ = 0v or v+ t min to t max 1a note 3: ucsp parts are 100% tested at +25? only, and guaranteed by design over the specified temperature range. tssop and thin qfn parts are 100% tested at t max and guaranteed by design over the specified temperature range. note 4: the algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value is a maximum. note 5: guaranteed by design for ucsp and thin qfn parts. note 6: ? r on = r on(max) - r on(min) . note 7: flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. note 8: guaranteed by design. note 9: off-isolation = 20log 10 (v com / v no ), v com = output, v no = input to off switch. note 10: between any two switches.
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp 6 _______________________________________________________________________________________ leakage current vs. temperature max4737/38/39 toc04a temperature ( c) leakage current (pa) 60 35 10 -15 100 200 300 400 500 0 -40 85 v+ = 3v com on-leakage com off-leakage leakage current vs. temperature max4737/38/39 toc04b temperature ( c) leakage current (pa) 60 35 10 -15 200 400 600 800 1000 0 -40 85 v+ = 5v com on-leakage com off-leakage charge injection vs. v com max4737/38/39 toc05 v com (v) charge injection (pc) 4 3 2 1 10 20 30 40 50 0 05 c l = 1nf v+ = 5v c l = 1nf v+ = 3v supply current vs. temperature max4737/38/39 toc06 temperature ( c) supply current (na) 60 35 10 -15 1 2 3 4 5 6 0 -40 85 v+ = 5v v+ = 3v supply current vs. logic level max4737/38/39 toc07 logic level (v) supply current ( a) 4 3 2 1 20 40 60 80 100 0 05 v+ = 5v v+ = 3v turn-on/off time vs. supply voltage max4737/38/39 toc08 supply voltage (v) t on /t off (ns) 4.5 3.5 2.5 20 40 60 80 100 0 1.5 5.5 t on t off on-resistance vs. v com max4737/38/39 toc01 v com (v) r on ( ? ) 4 3 2 1 2 4 6 8 10 0 05 v+ = 1.8v v+ = 2.5v v+ = 3v v+ = 4.2v v+ = 5v on-resistance vs. v com max4737/38/39 toc02 v com (v) r on ( ? ) 2.5 2.0 1.5 1.0 0.5 2 3 4 5 6 1 0 3.0 t a = +85 c t a = +25 c t a = -40 c v+ = 3v on-resistance vs. v com max4737/38/39 toc03 v com (v) r on ( ? ) 4 3 2 1 1 2 3 4 5 0 05 v+ = 5v t a = +85 c t a = +25 c t a = -40 c typical operating characteristics (t a = +25?, unless otherwise noted.)
turn-on/off time vs. temperature max4737/38/39 toc09 temperature ( c) t on /t off (ns) 60 35 10 -15 10 20 30 40 50 60 0 -40 85 t on , v+ = 3.0v t on , v+ = 5.0v t off , v+ = 5.0v t off , v+ = 3.0v rise/fall-time delay vs. supply voltage max4737/38/39 toc10 supply voltage (v) output rise/fall-time delay (ps) 4.5 3.5 2.5 0.5 1.0 1.5 2.0 2.5 3.0 0 1.5 5.5 input rise/fall time = 15ns figure 3, c l = 50pf rise delay fall delay rise/fall-time delay vs. temperature max4737/38/39 toc11 temperature ( c) output rise/fall-time delay (ns) 60 35 10 -15 0.5 1.0 1.5 2.0 0 -40 85 input rise/fall time = 15ns figure 3, c l = 50pf v+ = 4.2v rise delay fall delay max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp _______________________________________________________________________________________ 7 rise time to fall time mismatch vs. supply voltage max4737/38/39 toc12 supply voltage (v) mismatch (ps) 4.5 3.5 2.5 100 200 300 400 0 1.5 5.5 input rise/fall time = 15ns figure 3, c l = 50pf rise time to fall time mismatch vs. temperature max4737/38/39 toc13 temperature ( c) mismatch (ps) 60 35 10 -15 50 100 150 200 0 -40 85 input rise/fall time = 15ns figure 3, c l = 50pf v+ = 4.2v skew vs. supply voltage max4737/38/39 toc14 supply voltage (v) skew (ps) 4.5 3.5 2.5 100 200 300 400 0 1.5 5.5 input rise/fall time = 15ns figure 3, c l = 50pf skew vs. temperature max4737/38/39 toc15 temperature ( c) skew (ps) 60 35 10 -15 50 100 150 200 0 -40 85 input rise/fall time = 15ns figure 3, c l = 50pf v+ = 4.2v frequency response max4737/38/39 toc16 frequency (mhz) on-loss (db) 1 0.01 -120 -100 -80 -60 -40 -20 0 20 -140 0.0001 100 v+ = 3v/5v on-loss off-isolation crosstalk typical operating characteristics (continued) (t a = +25?, unless otherwise noted.)
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp 8 _______________________________________________________________________________________ pin max4737 max4738 max4739 ucsp tssop thin qfn ucsp tssop thin qfn ucsp tssop thin qfn name function d2 1 15 d2 1 15 no1 analog-switch normally open terminal d2 1 15 nc1 analog-switch normally closed terminal d1 2 1 d1 2 1 d1 2 1 com1 analog-switch common terminal c1 3 2 no2 analog-switch normally open terminal c1 3 2 c1 3 2 nc2 analog-switch normally closed terminal b1 4 3 b1 4 3 b1 4 3 com2 analog-switch common terminal a1 5 4 a1 5 4 a1 5 4 in2 logic-control digital input a2 6 5 a2 6 5 a2 6 5 in3 logic-control digital input b3 7 6 b3 7 6 b3 7 6 gnd ground. connect to digital ground. a3 8 7 a3 8 7 no3 analog-switch normally open terminal a3 8 7 nc3 analog-switch normally closed terminal a4 9 9 a4 9 9 a4 9 9 com3 analog-switch common terminal b4 10 10 b4 10 10 b4 10 10 com4 analog-switch common terminal pin description typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) total harmonic distortion vs. frequency max4737/38/39 toc17 frequency (hz) thd (%) 10k 1k 100 0.1 10 100k 1 0.01 v+ = 3v r l = 600 ? logic threshold vs. supply voltage max4737/38/39 toc18 supply voltage (v) logic threshold (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 0.4 0.8 1.2 1.6 2.0 0 1.5 5.5 v th+ v th-
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp _______________________________________________________________________________________ 9 detailed description the max4737/max4738/max4739 quad spst analog switches operate from a single +1.8v to +5.5v supply. the max4737/max4738/max4739 offer excellent ac characteristics, <0.5na leakage current, less than 1ns differential skew, and 15pf on-channel capacitance. all of these devices are cmos-logic compatible with v+ to gnd signal handling capability. the max4737/max4738/max4739 are usb-complaint switches that provide 4.5 ? (max) on-resistance and 15pf on-channel capacitance to maintain signal integri- ty. at 12mbps (usb full-speed data rate specification), the max4737/max4738/max4739 introduce less than 2ns propagation delay between input and output sig- nals and less than 0.5ns change in skew for the output signals (see figure 4). the max4737 has four normally open (no) switches, the max4738 has four normally closed (nc) switches, and the max4739 has two no switches and two nc switches. applications information digital control inputs the max4737/max4738/max4739 logic inputs accept up to +5.5v regardless of supply voltage. for example, with a +3.3v supply, in_ can be driven low to gnd and high to +5.5v allowing for mixing of logic levels in a system. driving the control logic inputs rail-to-rail mini- mizes power consumption. for a +1.8v supply voltage, the logic thresholds are 0.5v (low) and 1.4v (high); for a +5v supply voltage, the logic thresholds are 0.8v (low) and 2.0v (high). analog signal levels analog signals that range over the entire supply voltage (v+ to gnd) are passed with very little change in on-resis- tance (see typical operating characteristics ). the switch- es are bidirectional, so the no_, nc_, and com_ pins can be either inputs or outputs. power-supply bypassing power-supply bypassing improves noise margin and prevents switching noise from propagating from the v+ supply to other components. a 0.1? capacitor connect- ed from v+ to gnd is adequate for most applications. ucsp applications information for the latest application details on ucsp construction, dimensions, tape carrier information, pc board tech- niques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, refer to the application note: ucsp? wafer-level chip-scale package on maxim? web site at www.maxim-ic.com/ucsp . pin max4737 max4738 max4739 ucsp tssop thin qfn ucsp tssop thin qfn ucsp tssop thin qfn name function c4 11 11 no4 analog-switch normally open terminal c4 11 11 c4 11 11 nc4 analog-switch normally closed terminal d4 12 12 d4 12 12 d4 12 12 in4 logic-control digital input d3 13 13 d3 13 13 d3 13 13 in1 logic-control digital input c2 14 14 c2 14 14 c2 14 14 v+ positive analog supply 8, 16 8, 16 8, 16 n.c. no connection. not internally connected. pin description (continued)
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp 10 ______________________________________________________________________________________ test circuits/timing diagrams 50% logic input r l com_ gnd in_ c l includes fixture and stray capacitance. v out = v com v n_ v out v il v ih t off 0v no_ or nc_ 0.9 x v 0ut 0.9 x v out t on v out switch output logic input logic input waveforms inverted for switches that have the opposite logic sense. v+ c l v+ max4737/ max4738/ max4739 ( r l r l - r on ) figure 1. switching time logic input r l2 gnd c l includes fixture and stray capacitance. no_ in_ nc_ v out2 v+ v+ c l2 max4739 r l1 c l1 v out1 v com1 v com2 50% 0.9 x v 0ut1 0v logic input switch output 2 (v out2 ) 0v 0.9 x v out2 t d t d switch output 1 (v out1 ) com2 com1 v il v ih figure 2. break-before-make interval
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp ______________________________________________________________________________________ 11 t skew_i 90% 50% 10% 90% 50% 10% t fi input a input a- t ri t skew_o 90% 50% 10% 90% 50% 10% t fo output b output b- t ro b- c l a- r s a b c l txd+ txd- r s r s = 39 ? c l = 50pf delay due to switch for rising input and rising output signals. delay due to switch for falling input and falling output signals. change in skew through the switch for output signals. change in skew through the switch for input signals. |t skew_i | |t skew_o | |t fo - t fi | |t ro - t ri | figure 3. input/output skew timing diagram test circuits/timing diagrams (continued)
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp 12 ______________________________________________________________________________________ v gen gnd com_ c l v out v+ v out in off on off ? v out q = ( ? v out )(c l ) nc_ logic input waveforms inverted for switches that have the opposite logic sense. off on off in v il to v ih v+ r gen in_ max4737/ max4738/ max4739 or no_ figure 4. charge injection v+ c = 0.1 f nc_ or no_ v+ in_ 0v or v+ gnd com_ 50 ? * analyzer *used only for off-isolation test. signal generator 0dbm max4737/ max4738/ max4739 figure 5a. on-loss and off-isolation v+ c = 0.1 f v+ 0v or v+ gnd analyzer signal generator 0dbm com1 in1 no2 0v to v+ no1 in2 com2 50 ? n.c. max4737/ max4738/ max4739 figure 5b. crosstalk test circuit capacitance meter nc_ or no_ com_ gnd in_ 0v or v+ c = 0.1 f v+ f = 1mhz v+ max4737/ max4738/ max4739 figure 6. channel off-/on-capacitance test circuits/timing diagrams (continued) chip information transistor count: 361 process: cmos
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp ______________________________________________________________________________________ 13 pin configurations/functional diagrams/truth tables (continued) 14 13 12 11 10 9 8 1 2 3 4 5 6 7 max4737 tssop v+ in1 in4 no4 com4 com3 no3 com2 no2 com1 no1 gnd in3 in2 top view input switch state low high off on 14 13 12 11 10 9 8 1 2 3 4 5 6 7 max4738 tssop v+ in1 in4 nc4 com4 com3 nc3 com2 nc2 com1 nc1 gnd in3 in2 input switch state low high on off 14 13 12 11 10 9 8 1 2 3 4 5 6 7 max4739 tssop v+ in1 in4 nc4 com4 com3 no3 com2 nc2 com1 no1 gnd in3 in2 input no1, no3 low high off on nc2, nc4 on off 16 15 14 13 n.c. no1 v+ in1 9 10 11 12 com3 com4 no4 in4 4 3 2 1 in2 com2 no2 com1 5678 in3 gnd no3 n.c. max4737 qfn 16 15 14 13 n.c. nc1 v+ in1 9 10 11 12 com3 com4 nc4 in4 4 3 2 1 in2 com2 nc2 com1 5678 in3 gnd nc3 n.c. max4738 qfn 16 15 14 13 n.c. no1 v+ in1 9 10 11 12 com3 com4 nc4 in4 4 3 2 1 in2 com2 nc2 com1 5678 in3 gnd no3 n.c. max4739 qfn input no1, no3 low high off on nc2, nc4 on off input switch state low high on off input switch state low high off on
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp 14 ______________________________________________________________________________________ package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 16l,ucsp.eps h 1 1 21-0101 package outline, 4x4 ucsp
max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp ______________________________________________________________________________________ 15 package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 24l qfn thin.eps c 1 2 21-0139 package outline 12, 16, 20, 24l thin qfn, 4x4x0.8mm c 2 2 21-0139 package outline 12, 16, 20, 24l thin qfn, 4x4x0.8mm
package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) tssop4.40mm.eps max4737/max4738/max4739 4.5 ? quad spst analog switches in ucsp maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products.

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